LPC1315FBD48 Купить - NXP Микроконтроллер

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LPC1315FBD48

NXP

MCU 32Bit LPC1300 ARM Cortex M3 RISC 32KB Flash 2.5V/3.3V 48Pin LQFP

Наличие: 650 шт.

Адрес доставки: Москва

Цена: ₽ 210.87

шт.

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Производитель:

NXP

ЧипСити Номер продукта:

CC241529270

Категория продукта:

Микроконтроллер

3D модель

Оплата:

Обновлено 17.06.2025, 07:48:07(GMT+3)

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LPC1315FBD48 характеристики

Атрибут	Значение атрибута
Номенклатура	LPC1315FBD48
Производитель	NXP
ЧипСити Номер продукта	CC241529270
Категория продукта	Микроконтроллер
Даташит
3D модель	3D модель
Стиль Монтажа	Surface Mount
Количество Выводов	48 Pin
Корпус/Пакет	LQFP-48
Напряжение Питания (DC)	2.00V (min)
Количество Стежков	48 Position
Тактовая Частота	72.0 MHz
Размер ОЗУ	8 KB
Количество АЦП	1 ADC
Количество входов и выходов	40 Input IO
Рабочая температура (Макс)	85 ℃
Рабочая температура (мин)	-40 ℃
Напряжение питания (Макс)	3.6 V
Напряжение питания (мин)	2 V
Длина	7.1 mm
Ширина	7.1 mm
Высота	1.45 mm
Жизненный Цикл Продукта	Unknown
Упаковка	Each
RoHS Комплаенс	RoHS Compliant
REACH SVHC Compliance Edition	2015/12/17
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LPC1315FBD48 описание продукта

General description
The LPC1315/16/17/45/46/47 are ARM Cortex-M3 based microcontrollers for embedded
applications featuring a high level of integration and low power consumption. The ARM
Cortex-M3 is a next generation core that offers system enhancements such as enhanced
debug features and a higher level of support block integration.
Features and benefits
 System:
ARM Cortex-M3 r2p1 processor, running at frequencies of up to 72 MHz.
 ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
 Non Maskable Interrupt (NMI) input selectable from several input sources.
 System tick timer.
 Memory:
 Up to 64 kB on-chip flash program memory with a 256 byte page erase function.
 In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Flash updates via USB supported.
Up to 4 kB on-chip EEPROM data memory with on-chip API support.
 Up to 12 kB SRAM data memory.
 16 kB boot ROM with API support for USB API, power control, EEPROM, and flash IAP/ISP.
 Debug options:
Standard JTAG test interface for BSDL.
 Serial Wire Debug.
 Support for ETM ARM Cortex-M3 debug time stamping.
 Digital peripherals:
 Up to 51 General Purpose I/O (GPIO) pins with configurablepull-up/pull-down resistors, repeater mode, input inverter, and pseudo open-drain mode. Eight pins support programmable glitch filter.
Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources.
 Two GPIO grouped interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins.
High-current source output driver (20 mA) on one pin (P0_7).
 High-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5).
 Four general purpose counter/timers with a total of up to 8 capture inputs and 13 match outputs.
Programmable Windowed WatchDog Timer (WWDT) with a internal low-power WatchDog Oscillator (WDO).
Repetitive Interrupt Timer (RI Timer).
 Analog peripherals:
 12-bit ADC with eight input channels and sampling rates of up to 500 kSamples/s. 
Serial interfaces:
 USB 2.0 full-speed device controller (LPC1345/46/47) with on-chip ROM-based USB driver library.
USART with fractional baud rate generation, internal FIFO, a full modem control handshake interface, and support for RS-485/9-bit mode and synchronous mode. USART supports an asynchronous smart card interface (ISO 7816-3).
Two SSP controllers with FIFO and multi-protocol capabilities.
 I2C-bus interface supporting the full I2C-bus specification andFast-mode Plus with a data rate of up to 1 Mbit/s with multiple address recognition and monitor mode.
 Clock generation:
Crystal Oscillator with an operating range of 1 MHz to 25 MHz (system oscillator) with failure detector.
12 MHz high-frequency Internal RC oscillator (IRC) trimmed to 1 % accuracy over the entire voltage and temperature range. The IRC can optionally be used as a system clock.
Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable frequency output.
PLL allows CPU operation up to the maximum CPU rate with the system oscillator or the IRC as clock sources.
A second, dedicated PLL is provided for USB (LPC1345/46/47).
 Clock output function with divider that can reflect the crystal oscillator, the main clock, the IRC, or the watchdog oscillator.
 Power control:
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
Power profiles residing in boot ROM allow optimized performance and minimized power consumption for any given application through one simple function call.
Processor wake-up from Deep-sleep and Power-down modes via reset, selectable GPIO pins, watchdog interrupt, or USB port activity.
Processor wake-up from Deep power-down mode using one special function pin.
 Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, Power-down, and Deep power-down modes.
Power-On Reset (POR).
 Brownout detect with up to four separate thresholds for interrupt and forced reset.
 Unique device serial number for identification.
 Single 3.3 V power supply (2.0 V to 3.6 V).
 Temperature range 40 C to +85 C.
 Available as LQFP64, LQFP48, and HVQFN33 package.
Applications
 Consumer
peripherals 
Handheld scanners
 Medical
 USB audio devices
 Industrial control

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LPC1315FBD48 Даташит PDF

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06/28/2010